1. Field of the Invention
The present invention relates generally to a digital to analog converter for driving a flat panel display and, more particularly, to a time division sampling digital to analog converter for a flat panel display, in which a time division concept and a sampling mode analog addition concept are applied to the structure of a data driver integrated circuit, thereby preventing an increase in chip area due to the implementation of high-resolution driving, a method of implementing the digital to analog converter, and a data driver circuit using the digital to analog converter.
2. Description of the Related Art
FIG. 1 illustrates the construction of the channel DAC of a conventional data driver circuit. The channel Digital to Analog Converter (DAC) includes a 2n:1 multiplexer 10 having an n-bit wide digital data input and 2n analog inputs, a reference signal source 20 having 2n different signal size outputs, a gamma correction unit 30 for correcting the gamma characteristics of the reference signal source 20. The construction of a data driver circuit using the channel DAC is illustrated in FIG. 2.
In FIG. 2, the multiplexers 10-1, . . . , and 10-n of respective data channels share the outputs of a reference signal source 20 via a signal line 21 as analog inputs. The outputs of the multiplexers 10-1, . . . , and 10-n may be directly input to a display panel (not shown), or may be input to a display panel via buffers (not shown).
Generally, when the outputs of the reference signal source 20 directly drive a display panel, a buffer is disposed to connect to the outputs of the reference signal source 20. When the buffers are disposed to connect to the outputs of the multiplexers 10-1, . . . , and 10-n, a buffer may not be disposed to connect to the outputs of the reference signal source 20. The determination of such a structure depends on the electrostatic capacity of the display panel.
A mechanism for simultaneously outputting n-bit resolution signals (voltage or current) via the respective channels of a data driver circuit generally has the construction shown in FIG. 2.
In a data driver circuit operating at n-bit resolution, the multiplexer 10-1, . . . , or 10-n of each channel has an n-bit digital data input and 2n analog inputs, the digital data input is a control input signal for the multiplexer 10-1, . . . , or 10-n and functions to output one of the 2n reference signals as the output of the multiplexer 10-1, . . . , or 10-n, which is called a Pass Transistor Logic (PTL). The relationships between the digital input data and the analog output signals comply with a predetermined mapping table.
The gamma correction unit 30 allows the relationships between the digital input and output to be adjusted depending on the characteristics of a display panel. The relationships between input digital code values and the output sizes are not linear in the case of the driving of a Liquid Crystal Display (LCD) panel. The gamma correction unit 30 functions to partially tune the relationships.
Meanwhile, a conventional data driver circuit (or source driver circuit) for a flat panel display must independently have a plurality of output data channels. The number of data channels is determined depending on the resolution specifications of the flat panel display. If the number of outputs of a data driver circuit is insufficient, a plurality of data driver circuits is connected in parallel to each other and a high-resolution flat panel display is driven using the data driver circuits connected in parallel.
When a data driver circuit is fabricated using conventional channel DACs, multiplexers provided for respective channels and signal lines adapted to supply signals from the reference signal source for the respective data channels occupy a considerable portion of a data driver Integrated Circuit (IC). Furthermore, if the number of digital data bits is increased to increase color depth, the sizes of the multiplexers and the number of signal lines increase geometrically.
As a result, when the conventional channel DAC structure is employed, the area of the data driver circuit must be increased to increase color depth, so that the degree of integration of the data driver circuit is considerably reduced. That is, in order to maintain the same number of data channels while implementing high resolution, costs, such as an increase in the size of a data driver circuit or a reduction in design rule at the time of manufacturing a data driver IC, may be inevitably incurred.
That is, in order to increase color depth, the size of the data driver IC must be increased, which deteriorates the cost competitiveness of the data driver IC.